In recent years, as semiconductor integrated circuits (LSIs) used in electronic equipments have become higher in density and degree of integration, electrode terminals of LSI chips have rapidly become higher in pin count and narrower in pitch. In order to mount such an LSI chip on a wiring board, flip chip mounting has been widely used for reduction in wiring delay. In the flip chip mounting, it is typical to form solder bumps on electrode terminals of an LSI chip and simultaneously bond the electrode terminals to electrodes formed on a wiring board via the solder bumps.
Conventionally, a plating method, a screen printing method, and the like have been developed as bump forming techniques. The plating method is suitable for a narrow pitch, but has a problem in productivity because of complicated process steps. The screen printing method is excellent in productivity, but is not suitable for a narrow pitch because of the use of a mask.
In such a situation, several techniques of selectively forming solder bumps on electrodes of an LSI chip and a wiring board have been developed recently. These techniques are not only suitable for formation of micro-bumps but also capable of simultaneously forming the bumps and therefore are also excellent in productivity. These techniques have thus drawn attention as techniques applicable to mounting of a next-generation LSI on a wiring board.
One of these techniques is a technique called a solder paste method (for example, Patent document 1). In this technique, a solder paste made of a mixture of solder powder and flux is applied on a substrate having electrodes formed on a surface thereof, and the solder powder is melted by heating the substrate, whereby solder bumps are selectively formed on the electrodes having high wettability.
In a technique called a super solder method (for example, Patent document 2), a paste-like composition (a chemical reaction deposition-type solder) containing an organic acid lead salt and metallic tin as main components is applied on a substrate having electrodes formed thereon, and a substitution reaction between Pb and Sn is caused by heating the substrate, whereby a Pb/Sn alloy is selectively deposited on the electrodes of the substrate.
In a technique called a super juffit method (for example, see Patent document 3), a substrate having electrodes formed on a surface thereof is immersed in an agent to form an adhesive coating only on the surfaces of the electrodes, the adhesive coating thus formed is brought into contact with a solder powder so that the solder powder adheres to the electrodes, and the substrate is then heated, whereby the melted solder is selectively formed on the electrodes.
Patent document 1: Japanese Laid-Open Patent Publication No. 2000-94179
Patent document 2: Japanese Laid-Open Patent Publication No. HEI 1-157796
Patent document 3: Japanese Laid-Open Patent Publication No. HEI 7-74459